Arslan Riaz
[email protected]
I am a Digital IC Design Engineer with extensive hands-on experience in the hardware implementation of digital sub-blocks and SoC systems. Currently, I work on the architectural design and post-silicon validation of DFX IPs for high-performance computing systems at NVIDIA. Previously, I worked as a Research Scientist at Boston University in the WISE-Circuits Lab under the supervision of Prof. Rabia Yazicigil. I earned my Ph.D. in Electrical Engineering from Boston University in May 2024, where I focused on hardware implementations of the family of GRAND decoding algorithms in collaboration with Prof. Muriel Medard and Prof. Ken Duffy. My work spans ultra-low power IC design, secure wireless communication systems, and RF energy harvesting.
